Integrated circuit (IC) chip production is challenged by complex three-dimensional structures and films associated with these structures. Controlling film thickness on sidewalls of vertical surfaces of structures is crucial to proper operation of integrated circuits.
Optical techniques such as scatterometry have been used to assess sidewall film thickness. Scatterometry requires accurate and time-consuming modeling of an entire complex three-dimensional structure in order to achieve accurate measurements of sidewall film thickness. Moreover, accuracy can only be attained if most or all other parameters are tightly controlled, and measurement devices are calibrated according to the specific set of parameters. Such parameters include, for example, the composition of all films, surface roughness, feature morphology/shape, etc. This is due to the complex signature of the reflected signal. Even with tight control of the features, it remains difficult to reliably tease out an accurate film thickness measurement from the scatterometry signal. The utility of scatterometry methods are particularly limited in production mode.
Other techniques to assess sidewall film thickness include scanning electron microscopy (SEM) or transmission electron microscopy (TEM). However, taking cross sections to perform these techniques is destructive to the IC chip, and therefore substantially incompatible with use in production mode. It is also slow to perform, and produces a limited quantity of data.